Programming the STM32F4 DISCOVERY with the Bus Blaster
November 1, 2011 #electronics
In my last post I covered setting up a toolchain on macOS. In this post, I’ll show how to program and debug the STM32F4 Discovery board using open source tools and hardware.
The Discovery board supports ARM's two-wire SWD and six-wire JTAG debug ports. While ST provides official programmers, they lack Linux support. Fortunately, their dev boards include an ST-LINK USB-to-JTAG translator, which now has Linux support thanks to texane on GitHub. There's also a fork adding STM32F4 support, though it's still a bit unstable. So, let’s look at an altern...
Bus Blaster and OpenOCD
⚠️ Warning: OpenOCD doesn’t fully support Cortex-M4 yet. This method could damage your hardware. Use at your own risk.
The Bus Blaster is an open hardware JTAG debugger available from SeeedStudio for about $35. Any debugger compatible with OpenOCD should work with these instructions.
Download OpenOCD 0.5.0 from SourceForge, extract it, and run:
cd [OpenOCD]
CC=/usr/bin/gcc-4.2 CPP=/usr/bin/cpp-4.2 CXX=/usr/bin/g++-4.2 LD=/usr/bin/ld ./configure --prefix=/opt/local/ --enable-ft2232_libftdi
make
sudo make install
Download the STM32F4 Demo
Update: You’ll need to update LDFLAGS
, CC
, LD
, etc. in the Makefile to match your system.
git clone https://github.com/nabilt/STM32F4-Discovery-Firmware.git
cd STM32F4-Discovery_FW_V1.0.1/Project/IO_Toggle
make
JTAG pinout Discovery board
Connect all six JTAG pins from the Bus Blaster to the Discovery board. TDI is located at pin PA15 on header P2.
Important: Power the Discovery via the mini USB, but not from the computer — it may interfere with the JTAG pins.
Unload FTDI drivers that could interfere with OpenOCD:
sudo kextunload /System/Library/Extensions/FTDIUSBSerialDriver.kext/
Then run OpenOCD:
cd STM32F4-Discovery_FW_V1.0.1/openocd_config
openocd -f openocd.cfg -f stm32f4x.cfg
Expected output:
Open On-Chip Debugger 0.5.0 (2011-10-30-17:32)
...
Info : JTAG tap: stm32f4xxx.cpu tap/device found: ...
Info : stm32f4xxx.cpu: hardware has 6 breakpoints, 4 watchpoints
One TAP is for the CPU, the other for the FPU.
Programming and Debugging with GDB
In a second terminal:
arm-none-eabi-gdb
(gdb) target extended localhost:3333
(gdb) monitor halt
(gdb) file demo.elf
(gdb) load demo.elf
(gdb) continue
(gdb) br main.c:71
(gdb) info registers
Writing to Flash
So far we’ve only uploaded the code to SRAM. To flash the chip permanently:
arm-none-eabi-gdb
(gdb) target extended localhost:3333
(gdb) monitor halt
(gdb) file demo.elf
(gdb) monitor flash write_image erase demo.hex 0 ihex
(gdb) continue
This works with ST’s demo hex file, but may fail with custom builds due to linker issues.
Currently, it gets stuck in HardFault_Handler()
at stm32f4xx_it.c:61
. Let me know if you have ideas in the comments.
What Needs Work
- Fix the flash writing issue
- Add full STM32F4 support to OpenOCD